I've carried out some testing on a PWM controller using a 555 timer IC (see attached for circuit diagram) and I am having a little trouble understanding the results.
When the POT resistance is increased the duty cycle decreases. As I understand it, when the resistance is increased the voltage increases (V= IR). So to bring the voltage back down the switch stays closed for longer which means that the duty cycle decreases.
When the POT is left at a constant resistance and the source voltage is increased why does the period decrease and the duty cycle remain constant?
Does this mean that the switching frequency is increasing? If it is, why?
When the POT resistance is increased the duty cycle decreases. As I understand it, when the resistance is increased the voltage increases (V= IR). So to bring the voltage back down the switch stays closed for longer which means that the duty cycle decreases.
When the POT is left at a constant resistance and the source voltage is increased why does the period decrease and the duty cycle remain constant?
Does this mean that the switching frequency is increasing? If it is, why?
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