A trivial circuit analysis question

lundi 30 décembre 2013

1. The problem statement, all variables and given/known data







I had the question above in an exam. Although it's very trivial to analyze, I'm wondering what's wrong with part (e) of the question. It could be that I don't understand the hidden meaning behind this question, but I see it as obvious as that the current through RL will not be reduced, contrary to what the part (e) wants to prove, because it's independent of any resistance we add in parallel.



I would like my solution of part (e), in particular, to be looked at and be seen if there's anything wrong. the 'V' component is actually a DC supply not a capacitor as it looks like.



2. Relevant equations



none.



3. The attempt at a solution








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