Op-Amp Offset Cancellation

Q) What is the voltage at Node X or Node Y when S1, S2, S3 and S4 opens



A) My answer is zero (0v), but I am not 100% sure.



Here is my understanding:



The op-amp is in open-loop mode. Given that Vcm is biasing the opamp such that the transistor are all saturated. When S1, S2, S3 and S4 closes the differential output Vout = AVos is established across Vx' and Vy', i.e. Vout = Vx' - Vy' = AVos.



The Charge on C1 and C2 is given by



Q1 = C1 [ Vx' - Vcm] ; Q2 = C2[ Vy' -Vcm]

Q1 = C1 [ Vy + AVos -Vcm] ; Q2 = C2[ Vy' -Vcm]



The X and Y nodes are shorted to Vcm at the output Node. Once the S1, S2,S3 and S4 opens X and Y are floating (Picturing it as mechanical switch for simplicity). The charge remains on C1 and C2 (Trapped, ignoring sub-threshold leakage of N/PMOS).



Now if I consider a simple input capacitor based circuit as shown below:





Vx' should be ignored only if the output node voltage is zero before the switch closes, passing only

Vo when switch S1 closes. And thus cancelling the offset at the output caused by input offset.But the other thing is that output node is floating before S1 closes which makes me think it may be unknown. Not sure.