D Latch and D type Flip Flop Question

1. The problem statement, all variables and given/known data

Hello,







I am thinking about the operation of the D latches and Flip Flops. I know

the operation of Latch :

When clock is hi:

-Q follows D in simple combinational behaviour

- D/Q path is transperant ( what I think it means what is on D can be seen on Q) ?

At the transition from hi to low

- Q output frozen

-Non - combinational behaviour, Q ignores D intput changes.





Flip Flop :

When clock is low:

- the 'master' is transperant

-slave retained memorized output



At the transition low- hi:

-master stores input,slave transperant

-slave passes master stored value to the output

-'Data in' sampled at the rising clock edge, stored and passed to 'Data out'













My question is about the graphs under the diagrams. Should I take care only on the rising and folling edges of the clock ? Does it what only matters , I mean the values of D and Q on the rising and folling edges? If so, why the output waveform is like this, I mean it is changing during the hold, setup time ?



Thanks



2. Relevant equations







3. The attempt at a solution